hardware
#define hardware: \
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I /$$ /$$ /$$ \
I | $$ | $$ | $$ \
I | $$ | $$ /$$$$$$ /$$$$$$ /$$$$$$$ /$$ /$$ /$$ /$$$$$$ /$$$$$$ /$$$$$$ \
I | $$$$$$$$ |____ $$ /$$__ $$ /$$__ $$| $$ | $$ | $$ |____ $$ /$$__ $$ /$$__ $$ \
I | $$__ $$ /$$$$$$$| $$ \__/| $$ | $$| $$ | $$ | $$ /$$$$$$$| $$ \__/| $$$$$$$$ \
I | $$ | $$ /$$__ $$| $$ | $$ | $$| $$ | $$ | $$ /$$__ $$| $$ | $$_____/ \
I | $$ | $$| $$$$$$$| $$ | $$$$$$$| $$$$$/$$$$/| $$$$$$$| $$ | $$$$$$$ \
I |__/ |__/ \_______/|__/ \_______/ \_____/\___/ \_______/|__/ \_______/ \
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A+ Guide to Hardware: Managing, Maintaining, and Troubleshooting (sixth edition)
by Jean Andrews, Ph.D.
• visual representations are not up-to-scale nor have realistic relative sizes
LOGIC_GATES: LOGIC_GATES:
• gives a bool output dependent on bool inputs
• usually 1 or 2 inputs and 1 output
• see more AT "/Theory/Calculus/Logic"
Not:
• has one input, switch-es the signal
• all other gates have a corresponding not gate
<[gate]> -> <not> == corresponding not gates
+-----+ +---\ +-----+
| In1 |--------| |O--------| Out |
+-----+ +---/ +-----+
○ table
------------------
| In || Out |
------------------
| false || true |
| true || false |
------------------
And:
• true output if all input are true
○ graph
+-----+
| In1 |----+==========\
+-----+ | \
| \ +-----+
| |----| Out |
| / +-----+
+-----+ | /
| In2 |----+==========/
+-----+
○ table
--------------------------
| In1 | In2 || Out |
--------------------------
| false | false || false |
| false | true || false |
| true | false || false |
| true | true || true |
--------------------------
Or:
• true output if any input is true
○ graph
+-----+
| In1 |----+==========\
+-----+ \ \
\ \ +-----+
| |----| Out |
/ / +-----+
+-----+ / /
| In2 |----+==========/
+-----+
○ table
--------------------------
| In1 | In2 || Out |
--------------------------
| false | false || false |
| false | true || true |
| true | false || true |
| true | true || true |
--------------------------
Xor:
• true output if any input,
but not all inputs are true
○ graph
+-----+
| In1 |----+ +========\
+-----+ \ \ \
\ \ \ +-----+
| | |----| Out |
/ / / +-----+
+-----+ / / /
| In2 |----+ +========/
+-----+
○ table
--------------------------
| In1 | In2 || Out |
--------------------------
| false | false || false |
| false | true || true |
| true | false || true |
| true | true || false |
--------------------------
CIRCUITS: CIRCUITS:
Voting_machine: Voting_machine:
(In1 and In2) or (In2 and In3) or (In1 and In3)
• 3 inputs; 1 output
• if 2 or more true it returns true
○ graph
+-----+
| In1 |-----------------+-----+==========\
+-----+ | | \
| | \
| | In1 & In2 |---------------+
| | / \
+-----+ | | / \
| In2 |-----------+-----|-----+==========/ \
+-----+ | | \
| | \
| | \
| | \
+-----+ | | \
| In3 |-----+-----|-----|-----+==========\ \ +==========\
+-----+ | | | | \ ^------\ In1 \
| | | | \ \ or \ +-----+
| | | | In3 & In2 |----------------------------------| In2 |-----| Out |
| | | | / / or / +-----+
| | | | / .------/ In3 /
| +-----|-----+==========/ / +==========/
| | /
| | /
| | /
| | /
| | /
| +-----+==========\ /
| | \ /
| | \ /
| | In1 & In3 |---------------+
| | /
| | /
+-----------------+==========/
Half_adder: Half_adder:
In1 and In2; In1 xor In1
• 2 inputs; 2 output
• returns the sum (at the first "helyi érték"ˇHU ) and remainder of 2 bits
• the remainder is usually called carry
• called a half adder because its impossible to hook <int> number of them together to get the sum of <int> bit long nums
○ graph
+-----+
| In1 |-----------+-----+ +========\
+-----+ | \ \ \
| \ \ In1 \ +-------+
| | | xor |----| Sum |
| / / In2 / +-------+
+-----+ | / / /
| In2 |-----+-----|-----+ +========/
+-----+ | |
| |
| +-----+==========\
| | \
| | \ +-------+
| | In1 & In2 |----| Carry |
| | / +-------+
| | /
+-----------+==========/
○ table
• it makes more sense to display the values as nums here rather than bools
--------------------------
| In1 | In2 || Sum | Re. |
--------------------------
| 0 | 0 || 0 | 0 |
| 0 | 1 || 1 | 0 |
| 1 | 0 || 1 | 0 |
| 1 | 1 || 0 | 1 |
--------------------------
Adder: Adder:
(In1 xor In2) xor CarryIn; Voting_machine(In1, In2, CarryIn)
• 3 inputs; 2 outputs
• input and output carry
• <int> number of them can be hooked up together to get the sum of <int> bit long nums
+-----+
| In1 |-----------+-----+ +========\
+-----+ | \ \ \
| \ \ In1 \
| | | xor |------------------+ +========\
| / / In2 / \ \ \
+-----+ | / / / \ \ In1 \ +----------+
| In2 |-----+-----|-----+ +========/ | | xor |-----| Sum |
+-----+ | | / / In2 / +----------+
| | +---------+ / / /
| | | CarryIn |------+--------------+ +========/
| | +---------+ |
| | |
| | |
| | |
| | +-------+====================+
| | | | +----------+
| +-------------------------------| Voting Machine |-----| CarryOut |
| | | +----------+
+-------------------------------------+====================+
Single_bit_artimetric_unit: Single_bit_artimetric_unit:
+-----+
| In1 |-----------+-----+==========\
+-----+ | | \
| | \
| | In1 & In2 |-----+
| | / \
+-----+ | | / \
| In2 |-----+-----|-----+==========/ \ +-----+ +-----+
+-----+ | | \ | S₁ | | S₂ |
| | \ +-----+ +-----+
| | \ | |
| +-----+==========\ \ | |
| | \ \ ^-----+==================+
| | \ In1 \ | | +-----+
| | | Or |-------------------| Selector |----------| Out |
| | / In2 / | | +-----+
| | / / .-----+==================+
+-----|-----+==========/ / |
| | / |
| | / /
| | / /
| | +---\ / /
| +-----|¬In1|O---------------+ /
| | +---/ /
| | /
| | /
| +-----+===============+ /
| | |-----------------^
+-----------| Adder | +----------+
+---------+ | |-----------------------| CarryOut |
| CarryIn |-----------------+===============+ +----------+
+---------+
Flip_flops: Flip_flops:
• can be used for storing a binary state => memory
• 2 outputs that always have the opposite values of the circuit is powered on
• they are formerly called _Q_ and _Q_negate_
• _Q_negate_ is often discarded
Set_reset_flip_flop: Set_reset_flip_flop:
• or "S-R latch"
• 2 inputs and 2 outputs
• on 2 false inputs the output values wont change
• both inputs true is referred to as an illegal state (as its not intended usage)
• switch-ing the input which was least recently true to true will swap the values of the 2 outputs
+-----+
| In1 |-----------------+==========\
+-----+ \ \
\ In1 \ +-------+
| nor |O----+-----| Out |
/ ¬Out / | +-------+
/ / /
+-----+==========/ /
\ /
\ +----------------^
\/
/\
/ +----------------.
/ \
+-----+==========\ \
\ \ \
\ In2 \ | +-------+
| nor |O----+-----| ¬Out |
/ Out / +-------+
+-----+ / /
| In2 |-----------------+==========/
+-----+
D_flip_flop: D_flip_flop:
• 2 inputs and 2 outputs
• one of the inputs is formerly called _D_
• clock input somethin somethin ?!
— one of the inputs is a clocks positive/negative state changes
{
### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ###
Clock: ┌─────────────┐ ┌─────────────┐ ┌─────────────┐
│ │ │
─┘ └──────────────┘ └──────────────┘ └
### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ###
Converted_signal:
│ │ │
─┴────────────────────────────┴────────────────────────────┴─────────────
### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ### ###
}
• _D_ is copied to Q whenever the clock input is true
+==========+
. ---| D Q |---
| |
| _ |
. ---|>CLK Q |---
+==========+
Delaying:
• if _Q_ is wired to a not gate and looped back to _D_ then it can be used for halving the clock speed
• used in actual clocks and wrist watches
/----+
+-------O| |-------+
| \----+ |
| |
| +==========+ |
. +-----| D Q |-----+---
| |
| _ |
. ---|>CLK Q |---
+==========+
BREADBOARD:
• legend says that the name comes from the alternative name for cutting board,
which used to be used before "modern" breadboards became widely available
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┃ - + ┃ ┌┬┬┬┬┐ ┃ ┃ ┌┬┬┬┬┐ ┃ - + ┃
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A A A A A
| | | | |
| '. | | |
| '.| | .'
+-------------|'.--|------'
| | '.|
Power Rails | '-- Terminal Strips
|
Center Divider
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
│ │ ───── ───── │ │
Power_rails:
• responsible for providing easy power access from any point of the board
• must be connected to some power source;
there are power supply units specifically designed for bread boards which nicely fit to tip
DANGERS: DANGERS:
• getting electrocuted to death
ESD:
• static electricity
• could cause data loss, upset or catashtrophic failure
Countermeasure:
— grounding
• ground bracelet
• static strap
• ground mat
• static shielding bag
• antistatic gloves
• antistatic spray
Symbols:
--------------------
---------==--------- -======-
---------##--------- -=- -=-
--------####-------- -= -- =-
-------=####=------- -= ## =-
-------######------- = =##= =
------=##==--------- -- -#### --
-------------------- = #=-- =
-----=--------=----- = == - =
----=#-------##=---- = # - =# =
----#=-==---=###---- = == =- =##= =
---=#=-==-==--##=--- = -##-- #####- =
---###-=-=###---#--- -- ###==####### --
--####=#=#####=----- =-============-=
--##############---- -- --
--------------------
• a hand inside a >a circle surrounding
triangle, crossed a hand inside a
through triangle
Surge:
Countermeasure:
• having the computer plugged into a grounded outlet
computer_components
#define computer_components:: \
I-------------------------------------------------------------------------------------------------------------------\
I _____ _ _____ _ \
I / __ \ | | / __ \ | | \
I | / \/ ___ _ __ ___ _ __ _ _| |_ ___ _ __ | / \/ ___ _ __ ___ _ __ ___ _ __ ___ _ __ | |_ ___ \
I | | / _ \| '_ ` _ \| '_ \| | | | __/ _ \ '__| | | / _ \| '_ ` _ \| '_ \ / _ \| '_ \ / _ \ '_ \| __/ __| \
I | \__/\ (_) | | | | | | |_| | |_| | || __/ | | \__/\ (_) | | | | | | |_| | (_) | | | | __/ | | | |_\__ \ \
I \____/\___/|_| |_| |_| .__/ \__,_|\__\___|_| \____/\___/|_| |_| |_| .__/ \___/|_| |_|\___|_| |_|\__|___/ \
I | | | | \
I |_| |_| \
I-------------------------------------------------------------------------------------------------------------------I
— short and comprehensible list of commercial computer parts:
• PSU
• Motherboard
• CPU
• GPU
• RAM
— Drives
• HDD
• SSD
• Fans
PSU: PSU:
• "Power Supply Unit"
— dual-voltage selector switch
• optional
○ options
• 115 V
• 220 V
UPS:
• "Uninterruptible Power Supply"
• a regular PSU with a battery built in
Motherboards: Motherboards:
• main/system board or mobo
• normal mobos come with a piece of aluminium called and I/O shild,
its for covering the empty space between the ports and the case, there
by protecting the mobo
the turn on is meant to be invoked by pressing a button, however,
bringing the "pw+" and "pw-" (or "-pw+") pins together with any conductor {nail} should do the job
Parts:
• CPU socket(s)
• extension card slots
— bus:
• (usually) visible lines/traces from conductors
• these allow electricity and data to move from one component to another
— the collective name of these lines is the bus
• the parts of the bus that are responsible for address transfer are collectively called the address bus
• the parts of the bus that are responsible for data transfer are collectively called the data bus
Integration:
• most modern mobos have devices integrated (built into) them
• integrated devices perform tasks which are not strictly necessary for a computer to work
○ commonly integrated devices
• sound card
• network interface card
• gpu
— CROM
• holds BIOS settings
• must be powered at all times or it looses all data
— CROM battery:
• powers the CROM even when the mobo is disconnected from the grid
• in theory it should not affect the boot process, but there have been cases reported when
a faulty battery caused the computer to refuse to boot
CPU: CPU:
• see way more AT /Assmebly
• a web of logical gates
Instruction_sets: Instruction_sets:
— CISC
• "Complex Instruction Set Computer"
— RISC
• "Reduced Instruction Set Computer"
• hardware adaption for pipelining
• its counter part is CISC "Complex Instruction Set Computer"
+----------------------+--------------------+-------------+
| CISC | ################## | RISC |
+----------------------+--------------------+-------------+
| volatile | instruction length | const |
| volatile | execution time | const |
| memory referenceable | | load, store |
| small | cache size | large |
+----------------------+--------------------+-------------+
Branch_prediction: Branch_prediction:
• the act of educated guessing where the execution will continue
after a branch and pipeline loading instructions from that path
— static:
• compilers auto predict
• burnt into the machine code
— dynamic:
• previous results are stored
• the algorithms are top secrets of CPU manufacturers
Multi_core: Multi_core:
• modern processors consist of multiple micro processors
(usually 4 as of 2021)
— having multiple processors working together can be thought of
as a network of processors
○ topology:
• see better graphs and some details which apply AT /Networking/Topology
+-----------+ +-----------+
| Processor | | Processor |
+-----│-----+ +-----│-----+
#───────┼────────────────┼───────#
+-----│-----+ +-----│-----+
| Processor | | Processor |
+-----------+ +-----------+
+-----------+ +-----------+
| Processor | | Processor |
+-----\-----+ +-----/-----+
\ /
\ /
############
/ \
/ \
+-----/-----+ +-----\-----+
| Processor | | Processor |
+-----------+ +-----------+
+-----------+ +-----------+
| Processor | ─── | Processor |
+-----│-----+ +-----│-----+
│ │
+-----│-----+ +-----│-----+
| Processor | ─── | Processor |
+-----------+ +-----------+
+-----------+ +-----------+
| Processor | | Processor |
+-----│-----+ +-----│-----+
│ \ / │
│ \ / │
│ \/ │
│ /\ │
│ / \ │
│ / \ │
+-----│-----+ +-----│-----+
| Processor | | Processor |
+-----------+ +-----------+
• the most important trait of multicore systems is the existence of the race condition
• resolving race conditions require resources, resulting in overhead
— executing a process on size_t N processors doesnt mean that the execution time gets
divided by N, even in a hypothetical best case scenario
G = A * B
H = C * D
I = H * G
Normal execution: Execution on 2 processors:
1. A * B A * B C * D
| \ /
V V
2. C * D H * G
|
V
3. H * G
"If it takes 9 months for a pregnant woman to birth a child,\
how long does it take for 9 pregnant women to birth a child?"
• a race condition occurs whenever multiple processors need the same resource,
but only one must have it at the time
• for example when multiple processors need to read a var count and increase it by one;
if they were to read it at the same time {8}, they would both increase the same value {9}
and writing it back in {resulting in 9}
• a critical section or atomic operation is a computation that must not be interrupted {such as the ABOVE}
— selecting a processor:
• TAS "Test-And-Set"
• done by a resource free flag (variable)
• whenever a processor wants to enter a critical section with that resource it reads the flag and assigns it to BUSY;
if the flag signalled FREE (usually by 0) then it enters, and signals the other processors that the resource is taken;
if the flag is already BUSY, then the processor must wait
• TAS is an atomic operation by it self (handled by hardware tho)
• its the operating systems responsibility to assign a useful task to a processor waiting to enter a critical section { another program }
Multithreading:
pass
MMU:
• "Memory Management Unit"
• dedicated chip of the CPU responsible for translating addresses
• the translation lookaside buffer is a cached table of addresses used by the MMU
Cache:
• the processors own supper fast memory (see AT /Assembly/Memory/Memory hierarchy)
• multiple levels
○ insides:
Pentium:
┌───────────┐ ┌───────────┐
│ Registers │ │ Registers │
│ ┏━━┓ ┏━━┓ │ │ ┏━━┓ ┏━━┓ │
│ ┗━━┛ ┗━━┛ │ │ ┗━━┛ ┗━━┛ │
│ ┏━━┓ ┏━━┓ │ │ ┏━━┓ ┏━━┓ │
│ ┗━━┛ ┗━━┛ │ │ ┗━━┛ ┗━━┛ │
└────#─#────┘ └────#─#────┘
| | | |
+----------+ +--#-#--+ +--#-#--+
| | | | | |
| #--------# ALU | | ALU |
| Internal | | | | |
| memory | +--#-#--+ +--#-#--+
| cache | | | | |
| | +--#-#------------#-#--+
| #--------# Control Unit |
+----------+ +------#-#---#-#-------+
| | | |
+--------#-#---#-#---------+
| I/O unit |
+--------#-#---#-#---------+
| | | |
Pipeline_execution: Pipeline_execution:
• by splitting execution into steps and having dedicated components speed can be gained
• when a part finishes its own slice instead of waiting for the whole instruction to finish
it starts the execution of the next
○ ideal pipeline
• the number of steps greatly vary depending on CPU model; 2-20 steps aren't unheard-of;
however the following 5 step one is a classic set up
. F: instruction Fetch
. D: instruction Decode
. E: Execute
. M: Memory access
. W: register Write back
CLOCK CYCLES
+---------------------------------------------------------------------------------------->
I. II. III. IV. V. VI. VII. VIII.
┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮
│ ││ ││ ││ ││ │⋮ ⋮⋮ ⋮⋮ ⋮
│ F ││ D ││ E ││ M ││ W │⋮ F ⋮⋮ D ⋮⋮ E ⋮
│ ││ ││ ││ ││ │⋮ ⋮⋮ ⋮⋮ ⋮
└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮
┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮
│ ││ ││ ││ ││ │⋮ ⋮⋮ ⋮
│ F ││ D ││ E ││ M ││ W │⋮ F ⋮⋮ D ⋮ _ [...] _
│ ││ ││ ││ ││ │⋮ ⋮⋮ ⋮
└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘⋮‥‥‥‥‥‥‥‥‥⋮⋮‥‥‥‥‥‥‥‥‥⋮
┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐⋮‥‥‥‥‥‥‥‥‥⋮
│ ││ ││ ││ ││ │⋮ ⋮
│ F ││ D ││ E ││ M ││ W │⋮ F ⋮
│ ││ ││ ││ ││ │⋮ ⋮
└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘⋮‥‥‥‥‥‥‥‥‥⋮
○ hazard
• when two instructions meant to operate on the same registers/data its possible that pipelining corrupts the result
{
1. inc $rax
2. mov $rbx, $rax
CLOCK CYCLES
+------------------------------------------------------------------>
I. II. III. IV. V. VI.
┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐. . . . . .
│ ││ ││ ││ ││ │ . . . . .
│ F ││ D ││ E ││ M ││ W │. . . . . .
│ ││ ││ ││ ││ \ │ . . . . .
└─────────┘└─────────┘└─────────┘└─────────┘└───────\─┘. . . . . .
. . . . . .┌─────────┐┌─────────┐┌─────────┐┌────────\┐┌─────────┐
. . . . . │ ││ ││ ││ \│ │
. . . . . .│ F ││ D ││ E ││ M │\ W │
. . . . . │ ││ | ││ ││ ││\ │
. . . . . .└─────────┘└────|────┘└─────────┘└─────────┘└─\───────┘
| \
The point at which the second The point at which $rax-s value
istruction read $rax-s value changes to $rax + 1
=> ($rax == 6) and ($rbx == 5)
}
○ solutions
• by inserting an appropriate number of NOP-s (No OPerations), ie. waiting till the hazard is avoided;
this is done auto-matically by high level language compilers
• "adat előre engedés"^HU
• "utasítás sorrend csere"^HU
Memory: Memory:
Memory_hierarchy: Memory_hierarchy:
• the <int>th storages may have built in caches;
the OS may use the RAM to cache data from <int>th storage
/-----\ Smaller, faster, and
/(SRAM) \ more expensive
/ CPU \
/ Registers \
/-------------\
/ Cache (DAM) \
/-----------------\
/ Primary Storage \
/ Main Memory (RAM) \
/-----------------------\
/ Secondary Storage \
/ (disk drives, SSD's, etc.)\
/-----------------------------\
/ Tertiary Storage \
/ (remote storage, backups, etc.) \ Larger, slower, and
. ----------------------------------- less expensive
TYPES_BY_TECHNOLOGY: TYPES_BY_TECHNOLOGY:
SSD: SSD:
• "Solid State Drive"
ROM: ROM:
• "Read Only Memory"
• the data is "burned" into it on production
• because the production process must be specialized, its rather costly
• no moving parts
PROM: PROM:
• "Programmable ROM"
• on production all 1-s are "burned" into it
• its possible to set any 1 to a 0, but the process is irreversible
EPROM: EPROM:
• "Erasable PROM"
• on production all 1-s are "burned" into it
• its possible to set any 1 to a 0
• its possible to reset all bits to 1-s, ie. reset the whole thing to its original state (hence "erasable")
• erasing is done through physical processes {UV light}
EEPROM: EEPROM:
• "Electronically EPROM"
• erasing is done with electricity
• the part doesnt have to be removed from the machine to reset it
• partial erasing is possible
Flash:
• limited rewrites, however this property is negligible for personal usage
• refers to the speed
NOR:
• most cost effective at low capacities
• slower I/O compared to NAND
NAND:
• two bits for every bit which gets not-and-ed -> NAND
• faster I/O compared to NAND
• might be layed out in 2D or 3D
• there're 4 types by cell capacity: "slc", "mlc", "tlc", "qlc";
with each the amount of memory stored in the same volume is multiplied by 4
Disc: Disc:
• because writing data perfectly aligned with the previous data is practically impossible
data must be first read changed then wholly rewritten even if a single bit is to be changed
• therefor discs are cut up into independently handleable parts
• segmented into individual rings (which do not conspire) ("sávok"^HU)
• segmented into equal sized sectors (like a pizza)
• sectors are separated with gaps containing junk
{
Ring-1
ooooooooooo
ooooo | ooooo
oooo S-8 | S-1 oooo
ooo \. ooooo ./ ooo
ooo \. ooo | ooo ./ ooo
oo oo Ring-2 oo oo
oo S-7 oo \. | ./ oo S-2 oo
oo o \.|./ o oo
oo------o--------@--------o------oo
oo o /^|^\ o oo
oo S-6 oo /^ | ^\ oo S-3 oo
oo oo^ | ^oo oo
ooo /^ ooo | ooo ^\ ooo
ooo /^ ooooo ^\ ooo
oooo S-5 | S-4 oooo
ooooo | ooooo
ooooooooooo
}
○ sector parts
1. dummy data; 26 bytes of 0-s followed by 26 bytes of 1-s
allowing for the reading head to take up the rotation pace perfectly
2. IDAM; "ID Address Mark"; signals that a sector ID will soon follow
3. ID; identifies the sector, ring and disc side
4. CRC; proves ID value integrity
5. dummy data; 26 bytes of 0-s followed by 26 bytes of 1-s ensuring perfect syncing
6. DAM; "Data Address Mark"; signals that actual data will soon follow
7. <int> bytes of data; as of now (2022.) 512 is the norm
8. CRC; proves data integrity
9. gap before the next sector
┃ 0x00 │ 0xff │IDAM│ ID │CRC│ 0x00 │ 0xff │DAM│ DATA │CRC│ GAP ┃
─╂──────┼──────┼────┼────────┼───┼──────┼──────┼───┼────────────────────────────────────────────────────────────┼───┼───────╂─
<-26-> <-26-> <-26-> <-26-> <---------------------------512---------------------------->
HDD: HDD:
• commonly has jumpers
• magnetic
• moving parts
• disks
• RPM, "Round Per Minute" spinning speed; the higher the better
— transfer:
PATA:
• Parallel ATA
• uses an IDE cable for communication and a MOLEX for power (see looks AT "/Hardware/Ports/IDE" and "/Hardware/Ports")
• IDE cables are either has 40 or 80 wires
• 80 wire cables provide better performance
• IDE cables usually have ribbons, but smaller round are
available for better air flow (and therefor cooling)
• data is transferred in chunks, in parallel
• its speed is measured in MB/sec
SATA:
• Serial ATA
○ hierarchy
black < red
• data is transmitted in a single, const bit by bit flow
• its speed is measured in Gb/sec
RAM: RAM:
• "Random Access Memory" ("Tetszőleges Elérésű Memória"^HU)
• it takes the same time to read/write any address
SRAM:
• "Static RAM"
~1/4000 of the size of the main memory and decreasing (in bytes)
• CPU Cache
• uses flipflops
DRAM:
• Main memory (ram in the everyday sense)
• slower than SRAM
• uses a capacitor
• continuously discharges
• the preserve its value, it must repeatedly read and rewritten
TYPES_BY_USAGE: TYPES_BY_USAGE:
Cache: Cache:
• holds data present else where too
• its aim to speed up instruction/data fetching
• verb: refers to preloading some data to an intermediate medium which is faster than the original
• when requested data is present in the cache and therefor can be read from there its called a cache hit
• when requested data is not present in the cache and therefor cannot be read from there its called a cache miss
• works seamlessly from the perspective of the requester
• on a cache miss a cache line is over written with the requested data
— processor
• rather fast memory located physically closely to the registers
• has multiple levels; hierarchical in speed and reversely in memory size
• 3 levels of cache is the norm as of 2022
— cache line
where ${W} is the word size
where ${N} is an arbitrary [size_t], representing how much data shall be stored
on a single line and decided by the manufacturer
. Address: left most part of an ${W} sized memory address; since the cache stores in blocks
it only has to refer to the start of the block as its easily calculateble if
an address falls into (that; that + cache size) range
. V: validity bit; signals whether the address is valid (starts at 0 on start up;
changes very quickly from 1 to 0 to 1 again when the lines address is modified)
. D: dirty bit; signals if the cached data has been modifed
┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓
┃ Address ┃ V ┃ D ┃ Cached Data ┃
┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛
<-${W}-${N}-> 1 1 <---------------2^${N}------------------>
• if its decided that its best to overwrite the line, first the dirty bit is checked
and if its true data is first synced to disc
○ mapping methods
• how the original memory corresponds to cache memory
• cache lines are fixed sized
• memory is symbolically split into blocks each block is as long as a cache line
— fully associative
• every cache line may contain any data block
• the choose the best data to be cached an algorithm must be employed
• usually the last used line is replaced on a cache miss
• no matter what parts of memory are being used speed is consistent
• every cache line must be checked whether it contains the requested block;
this makes scaling harder
• checking is done simultaneously by a corresponding piece of hardware to every
cache line; that shit ain't cheap
— direct
• a cache line may only hold blocks from a pre-established set
┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ +-------------+
1. ┃ Address ┃ V ┃ D ┃ Cached Data ┃}---------------| Block-1 |
┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ | |
┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ \ +-------------+
2. ┃ Address ┃ V ┃ D ┃ Cached Data ┃}--\------------| Block-2 |
┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ \ | |
┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ \ \ +-------------+
3. ┃ Address ┃ V ┃ D ┃ Cached Data ┃}--\--\---------| Block-3 |
┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ \ \ | |
┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ \ \ \ +-------------+
4. ┃ Address ┃ V ┃ D ┃ Cached Data ┃}--\--\--\------| Block-4 |
┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ \ \ \ | |
\ \ \ \ +-------------+
• cheaper to scale \ \ \ ^---| Block-1 |
\ \ \ | |
• if blocks belonging to the same set are used continue-s after each \ \ \ +-------------+
other, it completely ruins performance \ \ ^---| Block-2 |
— group associative \ \ | |
• cache lines may only hold blocks from pre-established sets \ \ +-------------+
• multiple lines belong to the same set \ ^---| Block-3 |
• middle ground of filly associative and direct map-ping \ | |
\ +-------------+
• cheaper than fully associative mapping ^---| Block-4 |
• more reliable (and therefor faster if you zoom out the graph) | |
than direct map-ping +-------------+
/┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ +-------------+
/ ┃ Address ┃ V ┃ D ┃ Cached Data ┃}---------.. | Block-1 |
Group 1. { ┣━━━━━━━━━━━━━╋━━━╋━━━╋━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┫ \ #>---| |
\ ┃ Address ┃ V ┃ D ┃ Cached Data ┃}-\-------^^ | |
\┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ \ | |
/┏━━━━━━━━━━━━━┳━━━┳━━━┳━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓ \ \ +-------------+
/ ┃ Address ┃ V ┃ D ┃ Cached Data ┃}--\-\----.. | Block-2 |
Group 2. { ┣━━━━━━━━━━━━━╋━━━╋━━━╋━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┫ \ \ \ #>---| |
\ ┃ Address ┃ V ┃ D ┃ Cached Data ┃}-\--\-\--^^ | |
\┗━━━━━━━━━━━━━┻━━━┻━━━┻━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛ \ \ \ \ | |
\ \ \.# +-------------+
• cheaper to scale \ \ ^------| Block-3 |
\ \ | |
• if blocks belonging to the same set are used continue-s after each \ \ | |
other, it completely ruins performance \ \ | |
— group associative \.# +-------------+
• cache lines may only hold blocks from pre-established sets ^------| Block-4 |
• multiple lines belong to the same set | |
• middle ground of filly associative and direct map-ping | |
| |
• cheaper than fully associative mapping +-------------+
• more reliable (and therefor faster if you zoom out the graph)
than direct map-ping
○ technologies
SMART: SMART:
• "Self-Monitoring Analysis and Reporting Technology"
• the drive monitors it self and collects data on its own health so the user may suspect an upcoming failure beforehand
RAID: RAID:
• "Redundant Array of Inexpensive/Independent Drives"
• using more drives as less
• possible on either hardware or software level
• RAID performance is optimal with identical drives
○ kinds
— JBOD
• multiple physical drives holding a single partition
• used for convenience
— RAID 0
• multiple physical drives holding a single partition and
distributing data evenly
• used for convenience, drive sparing and performance
— RAID 1
• multiple disks mirroring, ie. holding the same data
• used for data safety
— RAID 5
• 3 or more drives sharing parity data for fault tolerance
• used for data safety and having better space usage (as data does not have to be fully copied) than RAID 1
• a single drive may fail without data loss, a hot spare may prevent dataloss from a fail following
shortly after
— RAID 10
• or RAID 1+0
• literally using both RAID 0 and RAID 1 (a single partition is getting mirrored)
• used for convenience, drive sparing, performance and data safety
ZFS:
pass
Expension_cards: Expension_cards:
• cards using buses operating on different voltages are designed
to not fit into incompatible slots, because such deed would likely
damage the equipment; such design is accomplished by having a notch
at different locations
• the wider the connection ports, the faster the card theoretically could transfer data
GPU: GPU:
• "Graphics processing unit"
• or graphics adapter
• most modern day mobos have (a very shitty) one integrated
• uses AGP or PCI slots to connect
RAM: RAM:
• "Random Access Memory"
• SIMMs are predecessors of the DIMM technology, not continue-d
• RIMMs came after the DIMM technology, not continue-d
• its best to keep them in the furthest slot from the CPU
DIMM:
• common technology
— single or double-sided
• memory chips are either installed on only one or both sides
• "dual ranked" (double-sided)
• single sided DIMMs actualy perform beter
— Parity
• error checking technology
• with every byte an extra bit is stored
• the parity bit is set in such a way to make the number of 1-s
either always odd or always even (either one or the other)
• if the parity bit doesnt reflect the data, that signals an error
— ECC
• Error-Correcting Code
• a technology which by having and extra chip ensures read data from the
card is correct
• more reliable
• all components must be able to support it
• if ECC and non ECC DIMMs are mixed, that will cause the system to not work
• possibly must be enabled in the BIOS
Speed:
• MHz
• PC rating
Sound_card: Sound_card:
• most mobos have (not so quality but more then fine for personal use) one integrated
• provides professional audio processing
Network_interface_card: Network_interface_card:
• "NIC"
• allows for networking functionality
• stores a MAC address (see AT "/Networking/?!")
• most mobos have one integrated
TV_tuner_card: TV_tuner_card:
• a card that processes cable TV signal
• commonly combined with a capture card
Capture_card: Capture_card:
• a card dedicated to capturing video
• commonly combined with a TV tuner card
Riser: Riser:
• redirects a GPU, most commonly in a 90° angle, or perhaps, by the use of two disconnected
card pieces and a USB cable, to any desired position
Cooling: Cooling:
○ dev
• fans
• heatsinks
• liquid cooling
Accessories: Accessories:
Keyboards: Keyboards:
— keyboard key values:
• control keys {shift, ctrl}, contrary to common belief, dont modify the key value
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
• look for keys where they are located at the board
• all keys returning a printable char are not marked
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
+----------+ +----------+----------+----------+----------+ +----------+----------+----------+----------+ +----------+-----------+-----------+------.----+ +--------------+----------------+--------------+
| Esc = 27 | | F1 = 112 | F2 = 113 | F3 = 114 | F4 = 115 | | F5 = 116 | F6 = 117 | F7 = 118 | F8 = 119 | | F9 = 120 | F10 = 121 | F11 = 122 | F12 = 123 | | Ptr Scr = 44 | Scrl lck = 145 | Pause = 19 |
+----------+ +----------+----------+----------+----------+ +----------+----------+----------+----------+ +----------+-----------+-----------+------.----+ +--------------+----------------+--------------+
+----------------+ +--------------+----------------+--------------+ +------------+----------+----------+----------+
| Backpspace = 8 | | Insert = 45 | Home = 36 | Page Up = 33 | | Nlck = 144 | N/ = 111 | N* = 106 | N- = 109 |
+---------+ +----------------+ +--------------+----------------+--------------+ +------------+----------+----------+----------+
| Tab = 9 | | Delete = 46 | End = 35 | Page Dw = 34 | | N7 = 103 | N8 = 104 | N9 = 105 | |
+---------+-+ +------------+ +--------------+----------------+--------------+ +------------+----------+----------+ N+ = 107 |
| CAPS = 20 | | Enter = 13 | | N4 = 100 | N5 = 101 | N6 = 102 | |
+-----------++ +------------+ +---------+ +------------+----------+----------+----------+
| Shift = 16 | | Shift = 16 | | Up = 38 | | N1 = 97 | N2 = 98 | N3 = 99 | Enter |
+-----------++ +----------+------------------------------------------------------------------+ ++-----------+ +-----------+-----------+------------+ +------------+----------+----------+ = |
| Ctrl = 17 | | Alt = 18 | Space = 32 | | Ctrl = 17 | | Left = 37 | Down = 40 | Right = 39 | | N0 = 96 | N. = 110 | 13 |
+-----------+ +----------+------------------------------------------------------------------+ +-----------+ +-----------+-----------+------------+ +------------+----------+----------+----------+
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Keys:
Sys_req:
• [alt] + [ptr_scr]
• "magical SYStem REQuest"
• on some systems {Linux} it is used to communicate with the kernel and cannot be intercepted by any program
Mice:
• "computer mouse"
— traditionally comes with at least 5 different inputs:
• left click
• right click
• wheel rolled upward
• wheel rolled downward
• wheel pushed down
Apple managed to fuck even this up
• inputs are often referred to by "Button" number
Button-3
│
Button-1 _...│ Button-2 ┌───────────────┐
╲.' | │'.╱ │ ....... │
/╲ |.' ╱\ │ |{_____}| │ A
| ╲ [_] ╱ | │ |{_____}| │ ┃
| | ╲ | │ |{_____}| │ ┃ Button-4
|-----'--╲--| │ |{_____}| │ ┃
| '─────────────┤ |{_____}| │ ╋
| | │ |{_____}| │ ┃
|; .| │ |{_____}| │ ┃ Button-5
;\ /; │ |{_____}| │ ┃
\\ ;/ │ '-------' │ V
jgs \'._ _.'/ └───────────────┘
Ports: Ports:
Power: Power:
P1: P1:
• connects to the mobo
• 20, 24 or 20+4 (for compatibility) pins
○ looks
┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓
┃ ╭╮ ┌┐ ┌┐ ╭╮ ╭╮ ┌┐ ┌┐ ╭╮ ╭╮ ┌┐ ┃
┃ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ ┃
┃ ┌┐ ╭╮ ╭╮ ┌┐ ┌┐ ╭╮ ╭╮ ┌┐ ┌┐ ╭╮ ┃
┃ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘ ┃
┗━━━━━━━━━━━━"░░░░░"━━━━━━━━━━━━┛
"#######"
AUX: AUX:
• "auxiliary"
• provides extra power to components
• 4, 6, 6+2 or 8 pins
• an 8 pin AUX is no different form 2, 4 pin AUX-es
○ looks
┏━━━━━━━━━━┓
┃ ┌┐ ┌┐ ┌┐ ┃
┃ └┘ └┘ └┘ ┃
┃ ┌┐ ┌┐ ┌┐ ┃
┃ └┘ └┘ └┘ ┃
┗━━━━━━━━━━┛
Molex: Molex:
• 4 pins
• used by PATA drives
○ looks
.---------.
| O O O O |
ˇ---------ˇ
Data: Data:
GPIO: GPIO:
• "General Purpose Input/Output"
• has no specific purpose
Serial: Serial:
• D89 port
• 9 pins
○ looks
.---------.
| O O O O O |
| O O O O |
ˇ-------ˇ
Paralel: Paralel:
• 25 pins
• replaced by USB-s
○ looks
.-------------------------.
| O O O O O O O O O O O O O |
| O O O O O O O O O O O O |
ˇ-----------------------ˇ
S_video: S_video:
• 4 or 7 pins
○ looks
......
. ###### .
. O OO O .
. O O .
. ## .
......
VGA: VGA:
• "Video Graphics Array port"
• or DB-15
• 15 pins
• analog video
• used by displays
○ looks
.-------------.
| O O O O O |
| O O O O O |
| O O O O O |
ˇ---------ˇ
DVI: DVI:
• "Digital Video interface port"
• digital or analog video
• designed to replace VGA
○ kinds
— DVI-D
• single or dual link
• digital only
— DVI-A
• analog only
— DVI-I
• digital or analog
○ looks
.--------------------. .--------------------. .--------------------.
| o o o o o o | | @I@ o o o o o | | @I@ o o o o o o |
| ¬¬¬ o o o o o o | | ¬¬¬ o o o | | ¬¬¬ o o o o o o |
| o o o o o o | | @I@ o o o o | | @I@ o o o o o o |
ˇ--------------------ˇ ˇ--------------------ˇ ˇ--------------------ˇ
.--------------------. .--------------------.
| o o o o o o o o | | @I@ o o o o o o o o |
| ¬¬¬ o o o o o o o o | | ¬¬¬ o o o o o o o o |
| o o o o o o o o | | @I@ o o o o o o o o |
ˇ--------------------ˇ ˇ--------------------ˇ
HDMI: HDMI:
• "High Definition Multimedia Interface"
○ looks
.------------.
| """""""""" |
ˇ. .ˇ
ˇˇˇˇˇˇˇˇˇˇ
Modem: Modem:
○ R3-11 port
○ looks
## [""] ##
##[ ]##
| |
| |
|--------|
Ethernet: Ethernet:
• network || RJ-45 port
○ looks
## ["="] ##
##[ ]##
| |
| |
|---------|
USB: USB:
• "Universal Serial Bus port"
• plenty of types
○ types
• the sizes are not proportional
.----------------.
: _ _ _ _ : USB Type A
:################:
'----------------'
/^^^^\
|' '| USB Type B
|_ _|
'------'
_.-----------._
| _ _ _ _ _ _ | USB Type C
ˇ-...........-ˇ
+-------+
\_____/ USB Mini A
+-------+
| | USB Mini B
ˇ-------ˇ
MMMMMMMM
M""""""M USB Micro A
ˇˇˇˇˇˇˇˇ
,mmmmmm.
M""""""M USB Micro B
ˇˇˇˇˇˇˇˇ
_____________________
|_ _ _ _|ˇ M_ _ _ _ _M USB Micro B Super Speed
^mmmmmmm^ \MMMMMMMMM/
— 4 pins up untill 2.x
• VBUS (+5V power)
• D- (data minus)
• D+ (data plus)
• GND (ground)
— 9 pins from 3.x
• VBUS (+5V power)
• D- (data minus)
• D+ (data plus)
• GND (ground)
• SS_TXP (SuperSpeed Transmit Data+)
• SS_TXM (SuperSpeed Transmit Data-)
• GND_DRAIN (ground)
• SS_RXM (SuperSpeed Receive Data-)
• SS_RXP (SuperSpeed Receive Data+)
○ Color coding
White - version 1.x
Black - version 2.x
Blue - version 3.0
Teal - version 3.0+
Red, Orange, Yellow - always under power (even when the computer is turned off)
eSATA: eSATA:
• extern SATA port
PS2: PS2:
• mini-DIN port
• 6 pins
○ looks
......
. O O .
. O ### #.
. O ### #.
. O O .
......
SATA: SATA:
• see more AT "../Drives/HDD/SATA"
○ looks
~~~########~##
##~#"ˇˇˇˇˇ"~~#
##~~~~~~~~~~##
IDE: IDE:
• 39 or 40 pins
○ looks
┏┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┳┓
┣╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋╋┫
┗┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┻┛
Factors:
• the specifications by which cases, PSU-s and mobos fit together
ATX:
• very common
• non-proprietary
— power:
• see AT "../Power"
• ps1
• aux
• molex
MATX:
• microATX
• ATX variation that is more compact
ITX:
• Mini-ITX
• MATX variation, that is even smaller
FlexATX
BTX
MicroBTX
PicoBTX
NLX
Computer_models: Computer_models:
CPU: CPU
M: memory
I/O: I/O unit
: data bus
: control bus
: address bus
┌──────────────────┐
┏━━━━━━━━━┓ ┏━━━━━━━━━┓
┃ ┃ ┃ ┃
┃ CPU ┃ ┃ M ┌──┨
┃ ┃ ┃ │IO┃
┗━━━━━━━━━┛ ┗━━━━━━┷━━┛
└──────────────────┘
• I/O devices have a designated space in memory by which they are addressable
• the CPU and the I/O unit are directly connected (through the 3th dimension)
┌───────────────────────────────────────┐
│ ┌────────────────┐ ┌────────────────┐ │
┏━━━━━━━━━┓ ┏━━━━━━━━━┓ ┏━━━━━━━━━┓
┃ ┃ ┃ ┃ ┃ ┃
┃ CPU ┃ ┃ M ┃ ┃ I/O ┃
┃ ┃ ┃ ┃ ┃ ┃
┗━━━━━━━━━┛ ┗━━━━━━━━━┛ ┗━━━━━━━━━┛
│ └────────────────┘ └────────────────┘ │
└───────────────────────────────────────┘
IO_unit:
• handles all information to be displayed
CPU_and_IO_unit:
○ means of communication
1. Polling ("Pollozgatás"^HU); continuous checking by the CPU for operations
2. Interrupts; the I/O unit sends a signal for the CPU requesting immediate handling;
the CPU stops what its currently doing, handles the request, than continue-s
3. With a DMA (see BELOW)
┌───────────────────────────────────────┐
│ ┌────────────────┐ ┌────────────────┐ │
┏━━━━━━━━━┓ ┏━━━━━━━━━┓ ┏━━━━━━━━━┓
┃ ┃ ┃ ┃ ┃ ┃
┃ CPU ┃ ┃ M ┌──┨ ┃ I/O ┃
┃ ┃ ┃ │IO┃ ┃ ┃
┗━━━━━━━━━┛ ┗━━━━━━┷━━┛ ┗━━━━━━━━━┛
│ └────────────────┘ └────────────────┘ │
└───────────────────────────────────────┘
• the I/O partition designated in memory makes a return very fast, because it turns out its a bloody good way of doing things
IO_unit:
• handles settings and options {terminal color, cursor position, ${COLUMNS}, ${LINES}}
Memory_IO_partition:
• handles raw data to be displayed
DMA:
• "Direct Memory Access unit"
• faster than using interrupts as those cause an over head when the new stack frame handling it is created
• sends DMA requests (DMAREQ-s) to the CPU
• DMA requests are answered with a DMA acknowledgements, after which the CPU stops
— part of the bus system
• every component is directly connected to every other, with all 3 types of buses
DMAREQ
<---------
┌──────────────────────────────────────────────────────────┐
│ ┌────────────────┐ ┌────────────────┐ ┌────────────────┐ │
┏━━━━━━━━━┓ ┏━━━━━━━━━┓ ┏━━━━━━━━━┓ ┏━━━━━━━━━┓
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┃
┃ CPU ┃ ┃ M ┌──┨ ┃ I/O ┃ ┃ DMA ┃
┃ ┃ ┃ │IO┃ ┃ ┃ ┃ ┃
┗━━━━━━━━━┛ ┗━━━━━━┷━━┛ ┗━━━━━━━━━┛ ┗━━━━━━━━━┛
│ └────────────────┘ └────────────────┘ └────────────────┘ │
└──────────────────────────────────────────────────────────┘
DMAACK
--------->
○ modes
— burst:
• continuous
• fastest means of data transfer
• the CPU awaits for a significantly long time (ie. no execution in the mean while)
— cycle steal:
• data is transferred at fixed sized pieces
• between transfers the CPU is given back control
• used when there's a significant speed difference between the data destination and source
— transparent:
• "transparent" from the view of the processor
• when it's certain that the CPU is not using the memory the DMA seamlessly uses the time to do its own business
• doesnt slow down execution at all
• slowest way of data transfer
Serial_port: Serial_port:
○ IBM I/O address and interrupt request presets
• COM<int> signals a serial device
• LPT<int> signals a parallel device
+------+-------------+-----+
| Port | I/O Address | IRQ |
+------+-------------+-----+
| COM1 | 0x3F8 | 4 |
| COM2 | 0x2F8 | 3 |
| COM3 | 0x3E8 | 4 |
| COM4 | 0x2E8 | 3 |
| LPT1 | 0x378 | 7 |
| LPT2 | 0x278 | 5 |
+------+-------------+-----+
○ differentiation
— COM<int> is selected by the user with jumpers
— unique COM identifier burnt into every device; processed on system start up
Serial rail connection
1. akinek '1' bekapcs
2. akinek '1' kikapcs
3. felezés
┏━━━━━━━━━┓
──┨ A1 D0 ┠───
┃ ┃
──┨ A2 D1 ┠───
┃ ┃
──┨ A1 D2 ┠───
┃ ┃
┃ D3 ┠───
┃ ┃
──┨ RD D4 ┠───
┃ ┃
──┨ WR D5 ┠───
┃ ┃
┃ D6 ┠───
┃ ┃
──┨ CS D7 ┠───
┗━━━━━━━━━┛
— A0-A2
• address wires
• on 3 bits its capable of addressing 8 different addresses
• selects one of D0-D7
— RD
• "ReaD"
• signals the intent an intent of reading
— WR
• "WRite"
• signals the intent an intent of writing
— CS
• "Chip Select"
• disables/enables the whole chip
Settings: Settings:
— DIP switches
• like actual little switches
— Jumpers
• a set of pins which must be "jumped", ie connected with a little cap
in a specific way to change a setting
BIOS:
• mostly deeply mobo specific, please refer to the cards documentation
• access by pressing or possibly holding a specific key while booting
○ most common BIOS access keys:
<F1> or <F2> or <F10> or <Del>
<Ctrl> and <Alt> and <S>
<Ctrl> and <Alt> and <Enter>
• BIOS settings are often stored with the help of a CROM and a dedicated battery (see ABOVE)
○ most commonly available options:
• boot order changing
• enabling UEFI boot
• disabling ports
• enabling intrusion detection
• enabling virtualization
• turning on SMART (see AT /Hardware/Drives/HHD)
• restore settings to default
Overclocking: Overclocking:
pass
Boot_process: Boot_process:
UEFI:
• successor of BIOS booting
• the BIOS hands over the boot process to the OS
Networking_Hardware: Networking_Hardware:
• see AT "/Networking/Networking_Hardware"
CASIO_CLASSWIZ_fx85CE_X: CASIO_CLASSWIZ_fx85CE_X:
• pressing the <SHIFT> or <ALPHA> key followed by a second key
performs the alternate function
• my machine is Hungarian, therefor so is the cheatsheet; it is what it is
○ Reading the display
+--------------------------------+
| [.........Indicators.........] |
| [.....Input.....] |
| [...............] |
| |
| [ANS] |
+--------------------------------+
Indocators:
▲ : theres more, older calculation history
▼ : theres more, more recent calculation history
▶ : the display continues on the right
◀ : the display continues on the left
S : <SHIFT> is on
A : <ALPHA> is on
D|R|G : "Degree/Radian/Gradian"; indicates the currently used angle unit
FIX : a fixed number of decimal places is in effect
SCI : a fixed number of significant digits is in effect
M : there is a value stored in ${M}
— >x : standing by for a variable to be assigned
ˇ□✏ : Mathl/MathO is selected for I/O
[pause] : an intermediate is shown
* : indicates that the solar panel is currently generating power
ANS:
• fractions in calculation results are displayed
after being reduced to their lowest terms
○ Menu
+----+----+----+
| x/ | I | □□ |
| +- | II | □□ |
+----1----2----3
1: Calculator
2: Statistics
3: Tables
○ Setup:
• <SHIFT> + <MENU>
+----------------------+----------------------+----------------------+
| | | |
| 1 : Bevitel/Kiírás | 1 : Statisztika | 1 : Language |
| 2 : Szög m. egys | 2 : Táblázat | 2 : QR Code |
| 3 : Számformátum | 3 : Ezres tagolás | 3 : Kontraszt |
| 4 : Tört alakja | 4 : Többsoros betű | |
| | | |
+----------------------+----------------------+----------------------+^HU
1 : Bevitel/Kiírás:
+-----------------+
| 1:Mat be/Mat | #default_
| 2:Mat be/Dec˙ |
| 3:Sor be/Sor° |
| 4:Sor be/Dec° |
+-----------------+
˙ : decimal output is applied when these formats cannot be output
° : all calculations input in a single line
2 : Szög m. egys:
• specifies angle unit
3 : Számformátum
• specifies format for_ the result
+-----------------------+
| 1 : Rögzített(Fix) |
| 2 : Tudományos(Sci) |
| 3 : Normál alak |
+-----------------------+
4 : Tört alakja
+------------+
| 1 : ab/c |
| 2 : d/c |
+------------+
• { (5*10)/8 ==> 25/4 || 6*(1/4) }
1 : Statisztika
• specifies whether to display frequency column in Statistics Mode Statistics Editor
+------------------+
| Gyakoriság? |
| 1 : Be |
| 2 : Ki |
+------------------+
2 : Táblázat
• specifies which functions to use in Table Mode
+------------------+
| 1 : f(x) |
| 2 : f(x), g(x) |
+------------------+
3 : Ezres tagolás
• specifies whether to use a separator char_ when displaying the results
+------------------+
| Számelválasztó? |
| 1 : Be |
| 2 : Ki |
+------------------+
4 : Többsoros betű
• specifies the font in and_ Modes (see AT ''1 : Bevitel/Kiírás'')
+---------------------+
| 1 : Normál betű |
| 2 : Kis betűtipus |
+---------------------+
1 : Language : duh
2 : QR Code
• ?!
3 : Kontraszt : duh
Modes:
calculator:
• basic signs do what you would expect (+; -; *; /; ^[...]; ˇ[...])
• operation priority is automatic
• the cursor will change to a '■' when theres less then 10 bytes of input space remaining
• putting a number immediately before parenthesis or a value {ˇ2} will result in a multiplication { 2(3*4) -> 24 };
however putting a number immediately AFTER will result in a syntax error
• when squaring a negative value, the value being squared must be enclosed in parentheses,
since x^2 has a higher priority than the negative sign
○ percentage:
<SHIFT> + <ANS> : writes a percentage ('%')
What is [x] percentage of [y]? ---> [y]*[x]%= { 30*50% == 15 }
[x] is what percentage of [y]? ---> [x]/[y]%= { 70*200% == 35 }
[x]% ---> 1*[x]% { 5% == 1/20 }
○ degrees
<¤' ''> : degree button
[int]<¤' ''>[int]<¤' ''>[int]<¤' ''> : a [degree value] (degrees¤minutes'seconds''); always input minutes and seconds,
even if the are 0; no need to 0 pad them tho;
[degree value]=<S<->D> : convert degree with minutes and/or seconds to a degree fraction
[int]<¤' ''> : convert degree fraction to a degree with minutes and/or seconds
○ multi-statement
<ALPHA> + <x+3> : char colon
[equation]:[equation][...] : execute all equation (independently) in a sequence,
allowing you switch between the results easily with the '=' button
○ prime factorization
<SHIFT> + <¤' ''> : <factorial>
• have to get the prime factors of a number, have it in [ANS] (not ${ANS}) and press the <factorial> button
• only 10 or less digit numbers, or it results in a mathematical error
○ combinatorics
cPr:
<SHIFT> + <MUL>
[value-1]P[value-2]
• calculates "Permutation"
nCR:
<SHIFT> + <DIV>
[value-1]C[value-2]
• "Choose"
• [value-2] under [value-1]
○ History
• maneuver in history with the up and down arrows
• resets whenever the <ON> button is pressed
○ Variables
• they survive restarts
• [base] is a button corresponding to a variable
+--------+---------+
| Name | [base] |
+--------+---------+
| ${ANS} | < = > |
| ${A} | <(-)> |
| ${B} | <°' ''> |
| ${C} | <x^-1> |
| ${D} | <sin> |
| ${E} | <cos> |
| ${F} | <tg> |
| ${M} | <M+> |
| ${x} | <)> |
| ${y} | <S<=>D> |
+--------+---------+
○ assignment
[value] + <STO> + [base]
○ recalling
<ALPHA> + [base]
○ list all
<SHIFT> + <STO>
○ ${M}
[value] + <M+> : adds [value] to ${M}
[value] + <SHIFT> + <M+> : subtracts [value] from ${M}
• "independent Memory"
• recall it as you would any other variable
○ Clear all
<SHIFT> + <9> & <2> & < = >
○ Misc:
<ALPHA> + <DEL> : undo/redo; cannot undo assignment to ${ANS}
<SHIFT> + <DEL> : toggle insert mode;
and_ : grants the ability to place place expressions in '□'s
(x^□; 10_^□; e^□ ; ˇ□; 3ˇ□; xˇ□)
and_ : overwrites to _char at the current position
<S<->D> : toggle decimal and fractional|ˇ form
○ randint syntax:
RandInt#([min]; [max])
statistics:
1. choose input type
2. choose calculation
{
1. with <MENU> open the mode menu
2. choose mode 2 for statistics
3. choose 1-var
4. in the newly displayed table start entering all values one by one,
they are '=' separeted
5. using <OPTN> choose 1-var statistics
6. interpret the info dump (this will contain the mean and
other things such as the min, max and standard deviation)
}
table:
• creates a table from a function
• inside the function f(x), <ALPHA> + 'x' is the correct way
to refer to 'x'
Trouble_shooting:
1, try restarting it
"\
A novice was trying to fix a broken Lisp machine by turning the power off and on. \
Knight, seeing what the student was doing, spoke sternly: \
<<You cannot fix a machine by just power-cycling it \
with no understanding of what is going wrong.>> \
Knight turned the machine off and on. \
The machine worked. \
"
2, try another the power unit